Modern DDR2 memory. Characteristics and markings of RAM Markings of ddr2 RAM
Now the current standard random access memory is DDR4, but there are still many computers in use with DDR3, DDR2 and even DDR. Because of this type of RAM, many users get confused and forget which RAM is used on their computer. This article will be devoted to solving this problem. Here we will tell you how to find out what RAM is used on your computer: DDR, DDR2, DDR3 or DDR4.
If you have the opportunity to open the computer and inspect its components, then all necessary information you can get it from the sticker on the RAM module.
Usually on the sticker you can find an inscription with the name of the memory module. This name begins with the letters “PC” followed by numbers, and it indicates the type of RAM module in question and its bandwidth in megabytes per second (MB/s).
For example, if a memory module says PC1600 or PC-1600, then it is a first-generation DDR module with a bandwidth of 1600 MB/s. If the module says PC2‑3200, then it is DDR2 with a bandwidth of 3200 MB/s. If PC3, then it is DDR3 and so on. In general, the first number after the letters PC indicates the DDR generation; if this number is not there, then it is a simple first generation DDR.
In some cases, RAM modules do not indicate the name of the module, but the type of RAM and its effective frequency. For example, the module may say DDR3 1600. This means that it is a DDR3 module with an effective memory frequency of 1600 MHz.
In order to correlate the names of modules with the type of RAM, and the bandwidth with the effective frequency, you can use the table that we provide below.
| Module name | RAM type |
| PC-1600 | DDR-200 |
| PC-2100 | DDR-266 |
| PC-2400 | DDR-300 |
| PC-2700 | DDR-333 |
| PC-3200 | DDR-400 |
| PC-3500 | DDR-433 |
| PC-3700 | DDR-466 |
| PC-4000 | DDR-500 |
| PC-4200 | DDR-533 |
| PC-5600 | DDR-700 |
| PC2-3200 | DDR2-400 |
| PC2-4200 | DDR2-533 |
| PC2-5300 | DDR2-667 |
| PC2-5400 | DDR2-675 |
| PC2-5600 | DDR2-700 |
| PC2-5700 | DDR2-711 |
| PC2-6000 | DDR2-750 |
| PC2-6400 | DDR2-800 |
| PC2-7100 | DDR2-888 |
| PC2-7200 | DDR2-900 |
| PC2-8000 | DDR2-1000 |
| PC2-8500 | DDR2-1066 |
| PC2-9200 | DDR2-1150 |
| PC2-9600 | DDR2-1200 |
| PC3-6400 | DDR3-800 |
| PC3-8500 | DDR3-1066 |
| PC3-10600 | DDR3-1333 |
| PC3-12800 | DDR3-1600 |
| PC3-14900 | DDR3-1866 |
| PC3-17000 | DDR3-2133 |
| PC3-19200 | DDR3-2400 |
| PC4-12800 | DDR4-1600 |
| PC4-14900 | DDR4-1866 |
| PC4-17000 | DDR4-2133 |
| PC4-19200 | DDR4-2400 |
| PC4-21333 | DDR4-2666 |
| PC4-23466 | DDR4-2933 |
| PC4-25600 | DDR4-3200 |
Using special programs
If your RAM modules are already installed in your computer, then you can find out what type they are using special programs.
The easiest option is to use free program CPU-Z. To do this, launch CPU-Z on your computer and go to the “Memory” tab. Here, in the upper left corner of the window, the type of RAM that is used on your computer will be indicated.
Also on the “Memory” tab you can find out the effective frequency at which your RAM operates. To do this, you need to take the “DRAM Frequency” value and multiply it by two. For example, in the screenshot below the frequency is 665.1 MHz, multiply it by 2 and get an effective frequency of 1330.2 MHz.
If you want to find out which specific RAM modules are installed on your computer, this information can be obtained on the “SPD” tab.
Here you can find out how many memory modules are installed, who their manufacturer is, what frequencies they can operate at, and much more.
With the emergence of new platforms on the mass market, DDR2 memory is becoming increasingly popular, which is gradually beginning to replace DDR memory. Initially, there was only DDR2-400 memory, which was quickly replaced by DDR2-533 memory. And now you can already find DDR2-667, DDR2-675, DDR2-750, DDR2-800, DDR2-900, DDR2-1000 and even DDR2-1066 memory. At the same time, we note that the standardized memory is currently DDR2-533 and DDR2-667. DDR2-800 memory will also be standardized in the near future, and many motherboards already support this type of memory. The remaining types of memory are not standardized, and it is not a fact that the motherboard is capable of supporting this memory at the stated clock frequency. The question arises: why are memory manufacturers, competing with each other, trying to produce faster and faster memory? The answer is quite simple - it's a marketing ploy. After all, according to the average buyer, the higher clock frequency, all the better. But is this really so and is memory performance really determined entirely by its clock speed? Is high-speed memory like DDR2-1000 really in demand today, or is this nothing more than a competition between memory manufacturers?
It turns out that clock frequency is far from the only and not even the most important characteristic of memory that determines its performance. A much more important characteristic is memory latency (memory timings), and in this sense, DDR2-800 memory with high latency will be less productive than DDR2-667 memory with low latency.
However, in order to understand all these nuances and find out what latency is and why this characteristic is more important than clock speed, we must first understand how RAM works.
What is RAM
RAM (or RAM memory Random Access Memory) is random access memory.
Since the elementary unit of information is a bit, RAM can be considered as a certain set of elementary cells, each of which is capable of storing one information bit.
An elementary RAM cell is a capacitor capable of storing electric charge, the presence of which can be associated with an information bit. Simply put, when a logical one is written to a memory cell, the capacitor is charged, and when a zero is written, it is discharged. When reading data, the capacitor is discharged through the reading circuit, and if the capacitor charge was non-zero, then the output of the reading circuit is set to a single value.
Since the elementary unit of information for modern computers is a byte (eight bits), for simplicity we can assume that an elementary memory cell that can be addressed stores not a bit, but a byte of information. Thus, memory access is performed not bit by bit, but byte by byte.
Memory chips are organized in the form of a matrix, reminiscent of a sheet of paper in a square, and the intersection of the column and row of the matrix defines one of the elementary cells. In addition, modern memory chips have several banks, each of which can be considered as a separate matrix with its own columns and rows.
In Fig. Figure 1 shows a simplified diagram of a memory chip that has four banks, each containing 8192 rows and 1024 columns. Thus, the capacity of each bank 8192x1024 = 8192 KB = 8 MB. Considering that the chip has four banks, it turns out that the total capacity of the chip is 32 MB.
When accessing a particular memory cell, you must specify the address of the desired row and column.
In order to access a memory cell to write or read information, you must specify the address of this cell. Taking into account the fact that a memory module uses several memory chips, and each chip contains several memory banks, first of all it is necessary to indicate in which chip and bank the cell is located. For this purpose, special signals CS, BA0 and BA1 are used.
The CS signal allows you to select the required memory chip. When the signal is active, the memory chip can be accessed, that is, the chip is activated. Otherwise the memory chip is not accessible.
Signals BA0 and BA1 allow you to address one of the four memory banks. Given that each signal can take one of two values: 0 or 1, the combinations 00, 01, 10 and 11 allow you to set the address of four memory banks.
Once a chip and memory bank are selected, the desired memory location can be accessed by specifying the column and row addresses. The row and column address are transmitted over a special multiplexed address bus MA (Multiplexed Address).
To read the row address, a special strobe pulse RAS (Row Address Strobe) is applied to the inputs of the memory matrix. More precisely, this pulse represents a change in signal level from high to low, that is, when the RAS signal transitions from high level When set to low, it is possible to read the line address.
Note that the reading of the line address does not occur at the moment the RAS signal changes, but is synchronized with the positive edge of the clock pulse.
Similarly, the column address is read when the CAS# (Column Address Strobe) signal changes from high to low and is synchronized with the positive edge of the clock pulse.
By the way, note that since all memory events (reading row and column addresses, issuing or writing data) are synchronized with the edges of the clock pulse, the memory is called synchronous.
The RAS# and CAS# pulses are applied sequentially one after another, and the CAS# pulse always follows the RAS# pulse, that is, the row is selected first, and then the column is selected.
After reading the row and column address of a memory cell, it can be accessed to read or write information. These operations are similar to each other, but for writing a special enabling signal (strobe pulse) WE# (Write Enable) is used. If the voltage signal changes from a high level to a low level, then information is written to the selected cell. If the WE# signal remains high, then information is read from the selected cell.
After all data has been written to or read from the cells of the active line, you must execute the Precharge command, which closes the active line and allows you to activate next line. The commands used for writing or reading and the corresponding gate states are presented in Table. 1 and in Fig. 2.
Table 1. Commands used to write or read memory cells
Memory Specifications
As is known, the main characteristic of memory is its throughput, that is, the maximum amount of data that can be read from memory or written to memory per unit time. It is this characteristic that is directly or indirectly reflected in the name of the memory type.
In order to determine memory bandwidth, you need to multiply the system bus frequency by the number of bytes transferred per clock cycle. SDRAM memory has a 64-bit (8-byte) data bus.
For example, DDR400 memory has a bandwidth of 400 MHz x 8 bytes = 3.2 GB/s. If the memory operates in dual-channel mode, then the theoretical memory bandwidth doubles, that is, for DDR400 memory in dual-channel mode it is 6.4 GB/s. Theoretical throughput for various types memory is shown in the table. 2.
Table 2. Correspondence between memory type and theoretical bandwidth
It would seem that the greater the memory bandwidth, the better. This is partly true, but only partly. The point is that memory bandwidth must be balanced with the processor bus bandwidth. And if the memory bandwidth exceeds the processor bus bandwidth, then it is the processor bus that becomes the bottleneck in the system, limiting the memory capabilities. If we consider the Intel Pentium 4 processor or the new dual-core Intel processors Pentium D, then the processor bus clock frequency is 800 or 1066 MHz. Considering that the bus width is 64 bits (or 8 bytes), we obtain that the processor bus bandwidth is 6.4 or 8.5 GB/s. It follows from this that if the system uses a processor with an FSB frequency of 800 MHz, then in single-channel mode for a balanced solution it is enough to use DDR2-800 memory, and in dual-channel mode - DDR2-400.
Similarly, if the system uses a processor with a FSB frequency of 1066 MHz, then in single-channel mode you will need to use DDR2-1066 memory for a balanced solution, while in dual-channel mode DDR2-533 memory is sufficient.
Considering that typical situation is the use of memory in dual-channel mode, DDR2-533 memory completely provides a balanced solution.
The question arises: if DDR2-533 memory provides bandwidth consistent with the bandwidth of the processor bus, why then is faster memory needed? The fact is that so far we have only talked about theoretical, that is, about the maximum possible throughput, which is realized only in the case of serial data transmission - when data is transmitted with each clock cycle. In a real situation, the theoretical limit is unattainable, since, in addition, it is necessary to take into account the clock cycles that are necessary to gain access to the memory cell itself, as well as for the settings of the memory module. In this regard, other important memory characteristics are memory timings or latency.
Latency is usually understood as the delay between the receipt of a command and its implementation. In this sense, latency can be compared to a telephone call. The time that passes from dialing a number (calling a subscriber) to answering on the handset is the latency of a telephone call.
Memory latency, which is determined by its timings, is the delay, measured in numbers of clock cycles, between individual instructions. Let's look at memory timings in more detail. In Fig. Figure 3 shows the sequence of commands when reading or writing data to memory. Initially, the desired memory line is activated (ACTIVE command), for which the RAS signal is transferred to low level and the line address is read. This is followed by a command to write (WRITE) or read (READ) data, for which the CAS signal is switched to a low level and the WE signal is set to the appropriate level. When CAS is set low, after the arrival of the positive edge of the clock pulse, the address of the column present in this moment on the address bus, and access to the desired column of the memory matrix is opened. However, a read or write command cannot immediately follow an activation command; it is required that between these commands, that is, between the RAS and CAS pulses, there is a certain period of time RAS to CAS Delay (delay of the CAS signal relative to the RAS signal). This delay, measured in system bus clocks, is commonly referred to as tRCD.
After the command to read (write) data and before the first data element is issued to the bus (writing data to a memory cell), a period of time passes, which is called CAS Latency. This latency is measured in system bus clocks and is denoted tCL. Each subsequent data element appears on the data bus in the next clock cycle.
The completion of the cycle of accessing a memory bank is carried out by issuing the PRECHARGE command, which leads to the closure of the memory line. After the PRECHARGE command and before a new memory row activation command is received, a period of time (tRP) called Row Precharge must pass.
Another type of delay, called ACTIVE to PRECHARGE delay, is the amount of time between the memory line activation command and the PRECHARGE command. This latency is denoted tRAS and is measured in system bus clocks.
Well, the last type of delay that needs to be mentioned is the speed of command execution (Command Rate). Command Rate is the delay in system bus clocks between the chip select CS# command and the line activation command. Typically, the Command Rate delay is one or two clock cycles (1T or 2T).
The described delays RAS to CAS Delay (tRCD), CAS Latency (tCL) and Row Precharge (tRP) determine the memory timings, recorded as a sequence tCLtRCDtRPtRASCommand Rate. For example, for a DDR400 module (PC3200) the timings can be as follows: 2-3-4-5-(1T). This means that for a given module, CAS Latency (tCL) is 2 clock cycles, RAS to CAS Delay (tRCD) 3 clock cycles, Row Precharge (tRP) 4 clock cycles, ACTIVE to PRECHARGE delay (tRAS) 5 clock cycles and Command Rate 1 bar.
It is clear that the shorter the timings, the faster the memory is. Therefore, if we compare memory with timing 3-3-3-5-(1T) and memory with timing 3-2-2-5-(1T), the latter turns out to be faster.
SDR memory
Having understood such important characteristics of memory as its timings, you can move directly to the principles of memory operation. Despite the fact that this article is devoted to modern DDR2 memory, we will begin our consideration of the principles of memory operation with synchronous SDRAM memory of the SDR (Single Data Rate) type.
SDR SDRAM ensures that all input and output signals are synchronized with the rising edges of the clock generator. The entire memory array of the SDRAM module is divided into two independent banks. This solution allows you to combine data retrieval from one bank with setting an address in another bank, that is, to simultaneously have two open pages. Access to these pages is bank interleaving and delays are eliminated accordingly, creating a continuous flow of data.
Until recently, the most common types of SDRAM memory were PC100 and PC133. The numbers 100 and 133 determine the system bus speed in megahertz (MHz) that this memory supports. In terms of internal architecture, control methods and external design, the PC100 and PC133 memory modules are completely identical.
SDRAM memory is organized batch processing data, which allows access to a new column address of a memory cell at each clock cycle. The SDRAM chip has a counter for increasing the addresses of columns of memory cells to ensure fast access to them.
In SDRAM memory, the core and clipboards operate in synchronous mode at the same frequency (100 or 133 MHz). Each bit from the buffer is transferred with each clock cycle of the memory core.
The timing diagram of SDR SDRAM memory operation is shown in Fig. 4.
DDR memory
DDR SDRAM, which replaces SDR memory, provides twice the bandwidth. The abbreviation DDR (Double Data Rate) in the name of the memory means double the data transfer rate. In DDR memory, each I/O buffer transfers two bits per clock cycle, effectively running at twice the clock speed while remaining fully synchronized with the memory core. This mode of operation is possible if these two bits are available to the I/O buffer at each memory clock cycle. This requires that each read command results in two bits being transferred from the memory core to the buffer at once. For this purpose, two independent transmission lines are used from the memory core to the I/O buffers, from where the bits are sent to the data bus in the required order.
Since this method of memory organization prefetches two bits before transferring them to the data bus, it is also called Pre-fetch 2.
In order to synchronize the operation of the memory core and I/O buffers, the same clock frequency (the same clock pulses) is used. Only if in the memory core itself synchronization is carried out on the positive edge of the clock pulse, then in the I/O buffer both the positive and negative edge of the clock pulse are used for synchronization (Fig. 5). Thus, the transfer of two bits to the I/O buffer over two separate lines is carried out on the positive edge of the clock pulse, and their output to the data bus occurs on both the positive and negative edge of the clock pulse. This provides twice the buffer speed and therefore twice the memory bandwidth (see Figure 5).
All other fundamental characteristics of DDR memory have not changed: the structure of several independent banks allows you to combine data retrieval from one bank with setting an address in another bank, that is, you can have two open pages at the same time. Access to these pages is interleaving (bank interleaving), which eliminates delays and ensures a continuous flow of data.
DDR2 memory
If we follow the terminology SDR (Single Data Rate), DDR (Double Data Rate), then it would be logical to call DDR2 memory QDR (Quadra Data Rate), since this standard implies four times higher transfer speed, that is, in the DDR2 standard at batch mode access data is transmitted four times in one clock cycle. For organization this mode Memory operation requires that the I/O buffer operate at four times the frequency of the memory core. This is achieved in the following way: the memory core, as before, is synchronized by the positive edge of the clock pulses, and with the arrival of each positive edge, four bits of information are transmitted along four independent lines to the I/O buffer (sampling four bits per clock). The I/O buffer itself is clocked at twice the memory core frequency and is synchronized on both the positive and negative edges of this frequency. In other words, with the arrival of positive and negative edges, bits are transmitted in multiplex mode to the data bus (Fig. 6). This allows for each clock cycle of the memory core to transfer four bits to the data bus, that is, quadruple the memory bandwidth.
Compared to DDR memory, DDR2 memory can provide the same bandwidth, but at half the core frequency. For example, in DDR400 memory the core operates at a frequency of 200 MHz, and in DDR2-400 memory at a frequency of 100 MHz. In this sense, DDR2 memory has significantly greater potential for increased bandwidth compared to DDR memory.
From theory to practice: DDR2-667 memory Kingmax KLCD48F-A8EB5-ECAS
Having studied the theoretical aspects of the functioning of modern DDR2 memory, let's move from theory to practice. As an example, we'll look at Kingmax's new DDR2-667 SDRAM memory. The testing stand had the following configuration:
- processor: Intel Pentium 4 570 (clock frequency 3.8 GHz, L2 cache 1 MB);
- FSB frequency: 800 MHz;
- motherboard: MSI P4N Diamond;
- chipset: NVIDIA nForce4 SLI Intel Edition;
- memory: two DDR2-667 Kingmax KLCD48F-A8EB5-ECAS modules, 1 GB each (dual-channel operating mode);
- video card: MSI NX6800 Ultra-T2D512E.
Unfortunately, technical information There is not enough information about the Kingmax KLCD48F-A8EB5-ECAS modules on the manufacturer’s website. The only thing we managed to find out was about the organization of the module (8S128 MB) and the value of the CAS Latency parameter, which is 5 clock cycles.
To test memory, we used the RightMark Memory Analyzer v 3.55 test package and a set of gaming benchmarks: Half-Life 2, DOOM 3, FarCry 1.3, Unreal Tournament 2004 and 3DMark 2003. In order to increase the load on the processor and memory, a resolution of 640×480 pixels was used during testing, and the video card driver was configured for maximum performance.
As it turned out during testing, KLCD48F-A8EB5-ECAS memory modules have default timings (by SPD) and form the sequence 5-5-5-13-(2T). Thus:
CAS Latency (tCL) 5T;
RAS to CAS delay (tRCD) 5T;
Row Precharge (tRP) 5T;
Active to Precharge (tRAS) 13T;
Command Rate 2T.
In order to evaluate the potential overclocking capabilities of memory modules (but without compromising stability), we also tested in mode with the lowest timings, which were determined by trial and error. As it turned out, the minimum timings that these memory modules support at a clock frequency of 667 MHz are the sequence 4-3-3-5-(2T). In addition, we overclocked the memory in order to estimate the maximum possible clock frequency supported by these modules when operating in dual-channel mode.
For testing using the RightMark Memory Analyzer v 3.55 test package, the presets built into the benchmark were used:
RAM Performance Stream;
Average Memory Bandwidth, SSE2;
Maximal RAM Bandwidth, Software Prefetch, SSE2;
Average RAM Latency;
Minimal RAM Latency, 16 Mbyte Block, L1 Cache line.
WITH detailed description Each preset can be found on the websites www.rightmark.org or www.ixbt.com.
The test results using the RightMark Memory Analyzer v 3.55 test package are presented in table. 3.
using the test package RightMark Memory Analyzer v 3.55
As follows from the testing results, the default timings (by SPD) are very high. Reducing timings does not affect the stability of memory modules, but leads to a significant increase in memory bandwidth and a decrease in latency. Thus, the maximum memory bandwidth at timings 5-5-5-13-(2T) is 5967.3 MB/s (read operation, Maximal RAM Bandwidth preset, Software Prefetch, SSE2). At the same time, when the timings are reduced to 4-3-3-5-(2T), the throughput increases to 6294.9 MB/s, that is, by 5.5%. Note that the value of 6294.9 MB/s is close to the theoretical limit of the processor bus bandwidth, which in this case is 6.4 GB/s.
Increasing the clock frequency to 710 MHz does not affect the stability of memory operation, however, it is not possible to achieve a significant increase in memory performance in this case, which once again confirms the fact that changing memory timings has a significantly greater impact on memory performance than increasing the clock frequency .
Now let's turn to the results of game tests (Table 4). As you can see, reducing memory timings allows (albeit slightly) to increase results in all gaming tests. At the same time, increasing the memory clock frequency does not affect the test results in any way.
***
So, if we talk about the reviewed Kingmax KLCD48F-A8EB5-ECAS memory modules, we can state that in combination with motherboard MSI P4N Diamond, and therefore with the NVIDIA nForce4 SLI Intel Edition chipset, these modules provide guaranteed stable operation and are perfectly overclocked by reducing timings. That is why we decided to give the Kingmax KLCD48F-A8EB5-ECAS modules the “Editorial Recommend” mark.
The editors express their gratitude to Kingmax( www.kingmax.com )for providing Kingmax KLCD48F-A8EB5-ECAS memory modules.
In this article we will look at 3 types of modern RAM for desktop computers:
- DDR- is the oldest type of RAM that can still be bought today, but its dawn has already passed, and this is the oldest type of RAM that we will consider. You will have to find not new motherboards and processors that use this type of RAM, although many existing systems use DDR RAM. The operating voltage of DDR is 2.5 volts (usually increases when the processor is overclocked), and is the largest consumer of electricity among the 3 types of memory we are considering.
- DDR2- This is the most common type of memory used in modern computers. This is not the oldest, but not the newest type of RAM. DDR2 is generally faster than DDR, and therefore DDR2 has a data transfer speed greater than the previous model (the slowest DDR2 model is equal in speed to the fastest DDR model). DDR2 consumes 1.8 volts and, like DDR, the voltage usually increases when overclocking the processor
- DDR3- fast and new type of memory. Again, DDR3 is faster than DDR2 and thus the most low speed same as the fastest DDR2 speed. DDR3 consumes less power than other types of RAM. DDR3 consumes 1.5 volts, and a little more when overclocking the processor
Table 1: Technical characteristics of RAM according to JEDEC standards
JEDEC- Joint Electron Device Engineering Council
The most important characteristic on which memory performance depends is its bandwidth, expressed as the product of the system bus frequency and the amount of data transferred per clock cycle. Modern memory has a bus width of 64 bits (or 8 bytes), so the bandwidth of DDR400 memory is 400 MHz x 8 Bytes = 3200 MB per second (or 3.2 GB/s). Hence, another designation for memory of this type follows - PC3200. IN Lately A dual-channel memory connection is often used, in which its (theoretical) bandwidth is doubled. Thus, in the case of two DDR400 modules, we will get the maximum possible data transfer speed of 6.4 GB/s.
But maximum memory performance is also affected by such important parameters as “memory timings”.
It is known that the logical structure of a memory bank is two-dimensional array- the simplest matrix, each cell of which has its own address, row number and column number. To read the contents of an arbitrary array cell, the memory controller must specify the RAS (Row Adress Strobe) row number and the CAS (Column Adress Strobe) column number, from which the data is read. It is clear that there will always be some kind of delay (memory latency) between issuing a command and its execution, which is what these timings characterize. There are many different parameters that determine timings, but the four most commonly used are:
- CAS Latency (CAS) - the delay in clock cycles between the application of the CAS signal and the direct output of data from the corresponding cell. One of the most important characteristics of any memory module;
- RAS to CAS Delay (tRCD) - the number of memory bus clocks that must pass after the RAS signal is applied before the CAS signal can be applied;
- Row Precharge (tRP) - the time it takes to close a memory page within one bank, spent on recharging it;
- Activate to Precharge (tRAS) - strobe activity time. The minimum number of cycles between the activation command (RAS) and the recharge command (Precharge), which ends work with this line, or closing the same bank.
If you see the designations “2-2-2-5” or “3-4-4-7” on the modules, you can rest assured that these are the parameters mentioned above: CAS-tRCD-tRP-tRAS.
Standard CAS Latency values for DDR memory are 2 and 2.5 clock cycles, where CAS Latency 2 means that data will be received only two clock cycles after receiving the Read command. In some systems, values of 3 or 1.5 are possible, and for DDR2-800, for example, latest version The JEDEC standard defines this parameter in the range from 4 to 6 clock cycles, while 4 is an extreme option for selected “overclocker” chips. The latency of RAS-CAS and RAS Precharge is usually 2, 3, 4 or 5 clock cycles, while tRAS is slightly longer, from 5 to 15 clock cycles. Naturally, the lower these timings (at the same clock frequency), the higher the memory performance. For example, a module with a CAS latency of 2.5 typically performs better than one with a latency of 3.0. Moreover, in a number of cases, memory with lower timings, operating even at a lower clock frequency, turns out to be faster.
Tables 2-4 provide general DDR, DDR2, DDR3 memory speeds and specifications:
Table 2: General DDR Memory Speeds and Specifications
Table 3: General DDR2 Memory Speeds and Specifications
| Type | Bus frequency | Data transfer rate | Timings | Notes |
|---|---|---|---|---|
| PC3-8500 | 533 | 1066 | 7-7-7-20 | more commonly called DDR3-1066 |
| PC3-10666 | 667 | 1333 | 7-7-7-20 | more commonly called DDR3-1333 |
| PC3-12800 | 800 | 1600 | 9-9-9-24 | more often called DDR3-1600 |
| PC3-14400 | 900 | 1800 | 9-9-9-24 | more commonly called DDR3-1800 |
| PC3-16000 | 1000 | 2000 | TBD | more commonly called DDR3-2000 |
Table 4: Common DDR3 Memory Speeds and Specifications
DDR3 can be called a newcomer among memory models. Memory modules of this type have only been available for about a year. The efficiency of this memory continues to increase, only recently reaching the JEDEC limits, and beyond these limits. Today, DDR3-1600 (JEDEC's highest speed) is widely available, and more manufacturers are already offering DDR3-1800). DDR3-2000 prototypes have been shown on the current market and should go on sale late this year or early next year.
The percentage of DDR3 memory modules entering the market according to manufacturers is still small, in the range of 1%-2%, which means that DDR3 has a long way to go before it matches DDR sales (still in the range of 12%- 16%) and this will allow DDR3 to approach DDR2 sales. (25%-35% according to manufacturers’ indicators).
The component market is constantly updated with new developments and innovations with enviable regularity, which is why many users, whose funds clearly do not allow them to acquire new hardware in a timely manner, have doubts about the power and performance of their computer as a whole. At all times, the discussion of a lot of questions on technical forums about the relevance of their components never subside. Moreover, the questions concern not only the processor, video card, but even RAM. However, even despite all the dynamics of the development of computer hardware, the relevance of technologies of previous generations is not lost as quickly. This also applies to components
DDR2 memory: from the first days on the market to the decline of popularity
DDR2 is the second generation of random access memory (from the English Synchronous Dynamic random access memory - SDRAM), or, in a formulation familiar to any user, the next generation of RAM after DDR1, which has become widespread in the segment of personal computers.
Having been developed back in 2003, the new type was able to fully gain a foothold in the market only towards the end of 2004 - only at that time did chipsets with DDR2 support appear. Actively advertised by marketers, the second generation was presented as an almost twice as powerful alternative.
What is worth highlighting first of all from the differences is the ability to operate at a significantly higher frequency, transmitting data twice in one clock cycle. On the other hand, a standard negative aspect of raising frequencies is an increase in delay time during operation.
Finally, by the mid-2000s, the new type thoroughly infringed on the position of the previous, first one, and only by 2010 was DDR2 significantly displaced by the new DDR3 that came to replace it.
Device Features
Distributed DDR2 RAM modules (in common parlance, called “dies”) had some distinctive features and varieties. And although the new one was not frankly striking for its time with an abundance of variations, even the external differences immediately caught the eye of any buyer at first glance:
- Single-sided/double-sided SDRAM module on which chips are located on one or two sides, respectively.
- DIMM is the current standard form factor for SDRAM (synchronous dynamic random access memory, which is DDR2). Massive use in general-purpose computers began in the late 90s, which was mainly facilitated by the appearance of the Pentium II processor.
- SO-DIMM is a shortened SDRAM module form factor designed specifically for laptop computers. SO-DIMM DDR2 dies for laptops had several significant differences from standard DIMMs. This is a module with smaller physical dimensions, lower power consumption and, as a result, lower performance level compared to a standard DIMM factor. An example of a DDR2 RAM module for a laptop can be seen in the photo below.
In addition to all the above features, we should also note the rather mediocre “shell” of the dies of those times - almost all of them, with rare exceptions, were then represented only by standard boards with microcircuits. Marketing in the computer hardware segment was just beginning to take off at that time, so there were simply no samples on sale with the ones already familiar to modern modules RAM radiators of the most various sizes and design. Until now, they perform primarily a decorative function rather than the task of removing generated heat (which, in principle, is not typical for DDR type RAM).
In the photo below you can see what DDR2-667 RAM modules with a heatsink look like.
Compatibility Key
DDR2 memory by its design has an extremely important difference from the previous DDR - the lack of backward compatibility. In the second-generation samples, the slot in the contact area of the strip with the RAM connector on the motherboard was already located differently, which made it physically impossible to insert a DDR2 stick into a connector designed for DDR without breaking one of the components.
Volume parameter
For serial motherboards(any motherboard for home/office use) DDR2 standard could offer maximum volume 16 gigabytes. For server solutions The volume limit reached 32 gigabytes.
It is also worth paying attention to one more technical nuance: The minimum size of one stick is 1 GB. In addition, there are two more variants of DDR2 modules on the market: 2Gb and 8Gb. Thus, in order to get the maximum possible supply of RAM of this standard, the user will have to install two 8 GB sticks or four 4 GB sticks, respectively.
Data transmission frequency
This parameter is responsible for the ability of the memory bus to pass as much information as possible per unit of time. A higher frequency means more data can be transferred, and here DDR2 memory has significantly outperformed the previous generation, which could operate in the range from 200 to 533 MHz maximum. After all, the minimum frequency of the DDR2 bar is 533 MHz, and top-end copies, in turn, could boast of overclocking to 1200 MHz.
However, with the increase in memory frequency, the timings naturally increased, on which memory performance not least depends.
About timings
Timing is the time interval from the moment of requesting data to reading it from RAM. And the more the frequency of the module increased, the longer the RAM needed to complete operations (not to the point of colossal delays, of course).
The parameter is measured in nanoseconds. The most influential factor on performance is latency timing (CAS latency), which in the specifications is designated as CL* (any number can be specified instead of *, and the lower it is, the faster the memory bus will operate). In some cases, the timings of the bars are indicated by a three-character combination (for example, 5-5-5), but the most critical parameter will be the first number - it always indicates memory latency. If the timings are indicated in a four-digit combination, in which the last value is strikingly greater than all the others (for example, 5-5-5-15), then this indicates the duration of the total working cycle in nanoseconds.
An old man who never loses his shape
With its appearance, the second generation caused a lot of noise in computer circles, which ensured its considerable popularity and excellent sales. DDR2, like the generation before it, could transfer data on both slices, but a faster bus with the ability to transfer data significantly increased its performance. In addition, a positive aspect was higher energy efficiency - at the level of 1.8 V. And if this hardly had any effect on the overall picture of the computer’s energy consumption, then it had a purely positive effect on the service life (especially with intensive work of the hardware).
However, technologies would cease to be such if they did not develop further. This is exactly what happened with the advent of the next generation DDR3 in 2007, whose task was to gradually but surely oust the aging DDR2 from the market. However, does this “obsolescence” really mean a complete lack of competition with new technology?
One on one with the third generation
In addition to traditional backward incompatibility, DDR3 introduced a number of several technical innovations to RAM standards:
- The maximum supported volume for serial motherboards increased from 16 to 32 GB (at the same time, one module could reach 16 GB instead of the previous 8).
- Higher data transmission frequencies, with a minimum of 2133 MHz and a maximum of 2800 MHz.
- Finally, reduced power consumption is standard for each new generation: 1.5 V versus 1.8 V for the second generation. In addition, two more modifications were developed based on DDR3: DDR3L and LPDDR3, consuming 1.35 V and 1.2 V, respectively.
Along with the new architecture, timings have also increased, but the drop in performance from this is offset by higher operating frequencies.
How the buyer decides
The buyer is not a development engineer; besides technical characteristics The price of the product itself will be no less important to the buyer.
At the start of sales of a new generation of any computer hardware, its cost will usually be higher. The same new type of RAM initially comes to the market with a very large price difference compared to the previous one.
However, the increase in performance between generations in most applications, if not absent at all, is simply ridiculous, clearly not worthy of large overpayments. The only right moment to switch to a new generation of RAM is the maximum drop in its price tag to the level of the previous one (this always happens in the SDRAM sales segment, the same was the case with DDR2 and DDR3, the same has now happened in the case of DDR3 and the new DDR4). And only when the price of overpayment between the latest and previous generations is the bare minimum (which is adequate for a small increase in performance), then only in this situation can you think about replacing RAM.
In turn, for owners of computers with DDR2 memory, it is most rational to acquire a new type of RAM only with a thorough upgrade from an appropriate one that supports this newest type, and a new motherboard (and even today it makes sense to upgrade to the level of components that support DDR4 memory: its current price is on par with DDR3, and the increase between the fourth and second generations will be much more noticeable than between the third and second).
Otherwise, if such an upgrade is not planned by the user at all, then it is quite possible to get by with the same DDR2, the price of which is now relatively low. It will only be enough to increase, if necessary, the total amount of RAM with similar modules. The permissible limits of this type of memory, even today, more than cover all the needs of most users (in most cases, installing an additional DDR2 2Gb module will be enough), and the performance lag with the next generations is completely uncritical.
Minimum prices for RAM modules (only samples of proven brands Hynix, Kingston and Samsung are taken into account) may vary depending on the region of residence of the buyer and the store he has chosen.
New generations of processors stimulated the development of faster SDRAM (Synchronous Dynamic Random Access Memory) with a clock frequency of 66 MHz, and memory modules with such chips were called DIMM (Dual In-line Memory Module).
For use with Athlon processors, and then with Pentium 4, the second generation of SDRAM chips was developed - DDR SDRAM (Double Data Rate SDRAM). DDR SDRAM technology allows data to be transferred on both edges of each clock pulse, which provides the ability to double memory bandwidth. With the further development of this technology in DDR2 SDRAM chips, it was possible to transmit 4 pieces of data in one clock pulse. Moreover, it should be noted that the increase in performance occurs due to optimization of the process of addressing and reading/writing memory cells, but the clock frequency of the memory matrix does not change. That's why overall performance the computer does not increase two or four times, but only by tens of percent. In Fig. The frequency principles of operation of SDRAM microcircuits of various generations are shown.
The following types of DIMMs exist:
- 72-pin SO-DIMM (Small Outline Dual In-line Memory Module) - used for FPM DRAM (Fast Page Mode Dynamic Random Access Memory) and EDO DRAM (Extended Data Out Dynamic Random Access Memory)
- 100-pin DIMM - used for SDRAM (Synchronous Dynamic Random Access Memory) printers
- 144-pin SO-DIMM - used for SDR SDRAM (Single Data Rate...) in laptop computers
- 168-pin DIMM - used for SDR SDRAM (less commonly for FPM/EDO DRAM in workstations/servers
- 172-pin MicroDIMM - used for DDR SDRAM (Double date rate)
- 184-pin DIMM - used for DDR SDRAM
- 200-pin SO-DIMM - used for DDR SDRAM and DDR2 SDRAM
- 214-pin MicroDIMM - used for DDR2 SDRAM
- 204-pin SO-DIMM - used for DDR3 SDRAM
- 240-pin DIMM - used for DDR2 SDRAM, DDR3 SDRAM and FB-DIMM (Fully Buffered) DRAM
- 244-pin Mini-DIMM – for Mini Registered DIMM
- 256-pin SO-DIMM - used for DDR4 SDRAM
- 284-pin DIMM - used for DDR4 SDRAM
To prevent the installation of an unsuitable type of DIMM module, several slots (keys) are made in the textolite board of the module among the contact pads, as well as on the right and left in the area of the module fixing elements on the system board. To mechanically identify different DIMM modules, a shift in the position of two keys in the module’s textolite board, located among the contact pads, is used. The main purpose of these keys is to prevent the installation of a DIMM module with an inappropriate supply voltage for memory chips into the socket. Additionally, the location of the key or keys determines the presence or absence of a data buffer, etc.
DDR modules are marked PC. But unlike SDRAM, where PC indicated the operating frequency (for example, PC133 - the memory is designed to operate at a frequency of 133 MHz), the PC indicator in DDR modules indicates the maximum achievable bandwidth, measured in megabytes per second.
DDR2 SDRAM
| Standard name | Memory type | Memory frequency | Bus frequency | Data transfer per second (MT/s) | |
| PC2-3200 | DDR2-400 | 100 MHz | 200 MHz | 400 | 3200 MB/s |
| PC2-4200 | DDR2-533 | 133 MHz | 266 MHz | 533 | 4200 MB/s |
| PC2-5300 | DDR2-667 | 166 MHz | 333 MHz | 667 | 5300 MB/s |
| PC2-5400 | DDR2-675 | 168 MHz | 337 MHz | 675 | 5400 MB/s |
| PC2-5600 | DDR2-700 | 175 MHz | 350 MHz | 700 | 5600 MB/s |
| PC2-5700 | DDR2-711 | 177 MHz | 355 MHz | 711 | 5700 MB/s |
| PC2-6000 | DDR2-750 | 187 MHz | 375 MHz | 750 | 6000 MB/s |
| PC2-6400 | DDR2-800 | 200 MHz | 400 MHz | 800 | 6400 MB/s |
| PC2-7100 | DDR2-888 | 222 MHz | 444 MHz | 888 | 7100 MB/s |
| PC2-7200 | DDR2-900 | 225 MHz | 450 MHz | 900 | 7200 MB/s |
| PC2-8000 | DDR2-1000 | 250 MHz | 500 MHz | 1000 | 8000 MB/s |
| PC2-8500 | DDR2-1066 | 266 MHz | 533 MHz | 1066 | 8500 MB/s |
| PC2-9200 | DDR2-1150 | 287 MHz | 575 MHz | 1150 | 9200 MB/s |
| PC2-9600 | DDR2-1200 | 300 MHz | 600 MHz | 1200 | 9600 MB/s |
DDR3 SDRAM
| Standard name | Memory type | Memory frequency | Bus frequency | Data transfer per second(MT/s) | Peak Data Rate |
| PC3-6400 | DDR3-800 | 100 MHz | 400 MHz | 800 | 6400 MB/s |
| PC3-8500 | DDR3-1066 | 133 MHz | 533 MHz | 1066 | 8533 MB/s |
| PC3-10600 | DDR3-1333 | 166 MHz | 667 MHz | 1333 | 10667 MB/s |
| PC3-12800 | DDR3-1600 | 200 MHz | 800 MHz | 1600 | 12800 MB/s |
| PC3-14400 | DDR3-1800 | 225 MHz | 900 MHz | 1800 | 14400 MB/s |
| PC3-16000 | DDR3-2000 | 250 MHz | 1000 MHz | 2000 | 16000 MB/s |
| PC3-17000 | DDR3-2133 | 266 MHz | 1066 MHz | 2133 | 17066 MB/s |
| PC3-19200 | DDR3-2400 | 300 MHz | 1200 MHz | 2400 | 19200 MB/s |
The tables indicate exactly the peak values; in practice they may be unattainable.
To comprehensively evaluate the capabilities of RAM, the term memory bandwidth is used. It takes into account the frequency at which data is transmitted, the bus width and the number of memory channels.
Bandwidth = Bus frequency x channel width x number of channels
For all DDR, the number of channels = 2 and the width is 64 bits.
For example, using DDR2-800 memory with a bus speed of 400 MHz, the bandwidth will be:
(400 MHz x 64 bit x 2)/ 8 bit = 6400 MB/s
Each manufacturer gives each of its products or parts its internal production marking, called P/N (part number).
For memory modules different manufacturers it looks something like this:
- Kingston KVR800D2N6/1G
- OCZ OCZ2M8001G
- Corsair XMS2 CM2X1024-6400C5
On the website of many memory manufacturers you can study how their Part Number is read.
| Kingston Part Number | Description |
| KVR1333D3D4R9SK2/16G | 16GB 1333MHz DDR3 ECC Reg CL9 DIMM (Kit of 2) DR x4 w/TS |
